TS-7800 JTAG

TS-7800 JTAG (Marvell 88F5182)

As shown in the TS-7800 schematic, the JTAG header is part of a 16-pin header that also includes COM1. The pin numbering is as follows:

(REAL TIME CLOCK)
2 4 6 8 10 12 14 16 18 20
1 3 5 7 9  11 13 15 17 19
(COM1 HEADER)

For the TMS and DOUT pins, there are two variants labelled either "core" or "cpu". For debugging with GDB use the ones labelled "cpu". Pins 11 through 16 are for connecting to COM1 and are not needed for JTAG. The full pin assignment is as follows:

1 TDI
2 nTRST
3 TMS
4 VREF
5 TCK
6 do not use
7 TDO
8 GND
9 do not use
10 do not use

The following openocd configuration should work for OpenOCD (substitute the proper interface path):

source [find interface/olimex-arm-usb-tiny-h.cfg]
jtag_khz 10000
jtag newtap feroceon cpu -expected-id 0x07926041 -irlen 4
target create feroceon.cpu feroceon -endian little -chain-position feroceon.cpu
reset_config trst_and_srst
adapter_nsrst_delay 200
jtag_ntrst_delay 200

If configured properly OpenOCD will output something similar to the following:

Open On-Chip Debugger 0.5.0-dev-00772-ge5677ce (2011-02-28-23:19)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.berlios.de/doc/doxygen/bugs.html
Info : only one transport option; autoselect 'jtag'
10000 kHz
trst_and_srst separate srst_gates_jtag trst_push_pull srst_open_drain
adapter_nsrst_delay: 200
jtag_ntrst_delay: 200
Info : max TCK change to: 30000 kHz
Info : clock speed 10000 kHz
Info : JTAG tap: feroceon.cpu tap/device found: 0x07926041 (mfg: 0x020, part: 0x7926, ver: 0x0)
Info : Embedded ICE version 0
Info : feroceon.cpu: hardware has 1 breakpoint/watchpoint unit